366 research outputs found

    Closed-Form Critical Conditions of Subharmonic Oscillations for Buck Converters

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    A general critical condition of subharmonic oscillation in terms of the loop gain is derived. Many closed-form critical conditions for various control schemes in terms of converter parameters are also derived. Some previously known critical conditions become special cases in the generalized framework. Given an arbitrary control scheme, a systematic procedure is proposed to derive the critical condition for that control scheme. Different control schemes share similar forms of critical conditions. For example, both V2 control and voltage mode control have the same form of critical condition. A peculiar phenomenon in average current mode control where subharmonic oscillation occurs in a window value of pole can be explained by the derived critical condition. A ripple amplitude index to predict subharmonic oscillation proposed in the past research has limited application and is shown invalid for a converter with a large pole.Comment: Submitted to an IEEE Journal on Dec. 23, 2011, and resubmitted to IEEE Transactions on Circuits and Systems-I on Feb. 14, 2012. My current six papers in arXiv have a common reviewe

    Poles and Zeros for Sampled-Data Duty-Ratio-to-Output Dynamics of Buck and Boost Converters

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    Poles and zeros for sampled-data models of buck and boost converters are derived analytically for the first time (to the author's knowledge). Both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) are considered. Comparisons are made with the corresponding results derived from the averaged model. For poles, the two models give similar results except in the DCM operation. For zeros, however the two models give quite different results. The zero obtained for the sampled-data model differs from that obtained for the averaged model. The zero derived from the sampled-data model depends on the switching frequency and duty ratio, as well as on the modulation scheme. For the buck converter in CCM, a single real zero exists even if the equivalent series resistance (ESR) is not modeled. Inclusion of the ESR in the model results in shifting the zero to the right in the complex plane. The zero can be unstable with or without the ESR being modeled. Undershoot is not observed because the zero is less than 1. For the boost converter in CCM, only one zero exists and this zero can be stable when the duty ratio is small. For the buck or boost converter in DCM, only one pole exists and there is no zero. The phase of the frequency response can go beyond -90 degree

    Unified model of voltage/current mode control to predict saddle-node bifurcation

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    A unified model of voltage mode control (VMC) and current mode control (CMC) is proposed to predict the saddle-node bifurcation (SNB). Exact SNB boundary conditions are derived, and can be further simplified in various forms for design purpose. Many approaches, including steady-state, sampled-data, average, harmonic balance, and loop gain analyses are applied to predict SNB. Each approach has its own merits and complement the other approaches.Comment: Submitted to International Journal of Circuit Theory and Applications on December 23, 2010; Manuscript ID: CTA-10-025

    Using Nyquist or Nyquist-Like Plot to Predict Three Typical Instabilities in DC-DC Converters

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    By transforming an exact stability condition, a new Nyquist-like plot is proposed to predict occurrences of three typical instabilities in DC-DC converters. The three instabilities are saddle-node bifurcation (coexistence of multiple solutions), period-doubling bifurcation (subharmonic oscillation), and Neimark bifurcation (quasi-periodic oscillation). In a single plot, it accurately predicts whether an instability occurs and what type the instability is. The plot is equivalent to the Nyquist plot, and it is a useful design tool to avoid these instabilities. Nine examples are used to illustrate the accuracy of this new plot to predict instabilities in the buck or boost converter with fixed or variable switching frequency.Comment: Submitted to an IEEE journal in 201
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